In the manufacture of semiconductors, silicon wafers are thermally processed. One method to process the wafers is to use horizontal furnace tubes. The wafers are processed to change their electrical properties and to build circuits. The temperatures for these processes range from 600 to nearly 1400° C.
The production of semiconductors is a very controlled process. As part of this process, furnace operations are performed on silicon wafers to build layers on the wafer and to dope materials into the wafer to change its electrical properties. Discrete dielectrics and pathways are formed to create capacitors and transistors. With precise configuration, a device is created.
Furnacing operations are generally classified into two categories, Atmospheric and Low Pressure Chemical Vapor Deposition (LPCVD). Atmospheric operations are used to anneal, to diffuse dopants into wafers, or to form oxide layers. These processes are typically performed at high temperatures, i.e., greater than about 900° C. Some atmospheric operations for high purity or for deep diffusion can reach temperatures of 1350° C.
LPCVD operations are used to build layers of polysilicon or silicon nitride onto the wafer. These operations take place under a partial vacuum, typically at lower temperatures in a range of between about 600° C. and 900° C.
A combination of the operations described above is used to construct a three dimensional device on the wafer. A simple device such as a power chip can have two layers while a complex logic circuit might have more than seven layers.
There are several different methods of furnacing wafers, referred to as horizontal, vertical, and Rapid Thermal Processing (RTP) methods. RTP is a single wafer process, whereas both vertical and horizontal furnacing are batch processes. More specifically, horizontal furnacing refers to a process in which many wafers are positioned on a wafer holder, or “boat”, which is inserted into a horizontal furnace tube. Devices, such as wafer boats (also known as conti boats), which are subjected to furnace operations during semiconductor wafer processing are referred to herein as “furnaceware”.
The material used to form the wafer boat must be resistant to high temperatures and not introduce impurities into the operation. When silicon wafers were first processed, the support fixtures were primarily made out of quartz. Quartz, however, suffers from several drawbacks when used in the production of wafer boats. In particular, at temperatures above about 1000° C., quartz tends to creep. After repeated furnace cycles, the quartz boats deform to an unacceptable degree. Wafer transfer operations are typically automated and it is critical to insert the wafer into a well defined feature of the furnaceware. If there is misalignment, the wafers may “crash” into the furnaceware contaminating the entire wafer load and often breaking. Broken wafers can introduce particles into the clean room environment and affect other processes as well.
Another drawback is particle generation. During LPCVD operations, a layer of deposited material, such as silicon nitride, is built up onto the surface of the wafer. The material that forms on the wafer during LPCVD operations, along with the wafer itself, have comparable thermal expansion rates such that a good mechanical and chemical bond exists. LPCVD deposits do not, however, adhere well to quartz because of mismatched thermal expansion coefficients which produce stress on the layers when the furnaceware is subjected to temperature changes. This stress causes the layers to flake and can introduce device-damaging particles into the system.
Chemical etching can also cause problems with quartz. Furnaceware is cleaned on a regular cycle to remove layers which have developed thereon. Typically, acid baths are used to remove these layers. Quartz can be chemically etched by the cleaning solutions used, and this can cause quartz furnaceware to lose strength and dimensional stability.
Many of the disadvantages known to exist in quartz furnaceware can be avoided by substituting other materials, such as silicon carbide (SiC) in the place of quartz. SiC has a thermal expansion coefficient similar to LPCVD depositions which form a mechanical and chemical bond to SiC. One useful replacement material is recrystallized SiC, available from Saint-Gobain Industrial Ceramics of Worcester, Mass., under the tradename CRYSTAR®. This material is a silicon carbide ceramic which has been impregnated with high purity silicon metal. Due to its robust mechanical properties through a wide range of temperatures and purity characteristics, CRYSTAR® ceramic has been shown to be an excellent alternative to quartz. CRYSTAR® may be used to support wafers during furnacing operations and can also serve as the furnace chamber.
As wafer sizes have increased, and as the size of features on the wafers has decreased, technological improvements in photolithograpy, inspection, furnacing, clean rooms and other areas have been required. Current production facilities for semiconductor devices employ wafers ranging in diameter from 100 mm to 200 mm. Currently, there is a desire to process wafers as large as 300 mm in diameter because such wafer sizes will allow more than twice as many chips or dies to be fabricated on each wafer. This is desirable because fine feature size devices require critical processing parameters, and there is a strong desire to reduce the number of wafers being processed and have a more tightly controlled production environment. Unfortunately, the shift to 300 mm wafers has been a slow process due to the large number of technical problems associated with the handling of large wafers.
Horizontal wafer manufacturing involves a series of thermal processing steps to build the device. Horizontal processing temperatures in excess of about 1000° C. for at least some of the manufacturing steps cannot be avoided. Due to the high temperatures and wafer stress, wafer slip can occur. A wafer is a single crystal disk. Wafer slip is the permanent plastic deformation of the wafer's crystal lattice. The transition temperature from brittle to ductile behavior of the wafer is about 720° C. Therefore, slip can occur at process temperatures above 720° C.
Wafer slip is important to the manufacturer because it has a negative impact on device performance. A device is made up of a series of gates which can switch states. These gates have precise features which must be maintained. If a slip plane occurs, the gates can become corrupted and fail to function properly. Even if the slip plane is small, device performance can be compromised because the dielectric properties have been changed. Typically, rather than investing more time in processing, a wafer with slip is scrapped.
Wafer slip creation is affected by several factors including temperature, gravitational stress, thermal stress, wafer type, wafer defects (edge chips, existing dislocations, oxygen content), and previous processing steps. As the thermal energy within the wafer increases, the energy required to induce slip decreases. Once the 720° C. ductile threshold is reached, slip lines can generate relatively easily. Shear stress, the dominant contributor, acts in plane and pushes the lattice so that it dislocates. Experimental and theoretical studies have analyzed the effects of temperature on allowable shear stress. Allowable shear stress is defined to be the maximum stress before the onset of slip.
Wafer mechanical stress and thermal differences are directly affected by the wafer boat. Accordingly a need exists for a wafer boat that minimizes these stresses with the resultant minimization of wafer slip.
The prior art discloses wafer boats for use in the manufacture and processing of semiconductor wafers. However, unlike the present invention, the prior art does not address nor overcome the disadvantages noted hereinabove. For example, in JP6124911, there is disclosed a horizontal wafer boat having a plurality of slots wherein a plurality of wafers are mounted. Each slot of the wafer boat, however, comprises a plurality of what appear as stabilizing or support members referred to as “wafer falling-down preventing members” which are provided with grooves to prevent the wafers from falling. This wafer boat also comprises flat supporting parts to support the weight of the wafer with its flat portion positioned in the slot. The wafer falling-down preventing members and the flat supporting parts, however are disadvantageous to the wafer positioned in the slot since the plurality of wafer falling-down preventing members and the flat supporting members contribute to wafer stress and wafer slip. Additionally, the boat described in JP6124911 is constructed to accommodate wafers with a flat portion positioned in the slot. This positioning of the wafer in the slot with its flat portion being supported by the boat allows side-to-side movement of the wafer in the slot, such as during transfer of the boat to and from a furnace. This wafer motion places stress on the wafer, increases particle formation and thus lowers device yields.
Thus, a need exists for a wafer boat which eliminates the disadvantages of the prior art wafer boats.